Field of the Invention
The invention relates to a memory apparatus and an operating method thereof, and particularly relates to a memory apparatus capable of self-defining a memory command and an operating method thereof.
Description of Related Art
A synchronous dynamic random-access memory (SDRAM) is a DRAM having a synchronous interface, which achieves synchronization with a computer bus through a clock signal. Along with progress of memory technology, a double data rate synchronous dynamic random access memory (DDR SDRAM) is also developed. The DDR SDRAM is a SDRAM having double transmission rate, which may implement data transmission at both of a rising edge and a falling edge of a system clock, so that the transmission rate thereof is twice of the system clock to achieve higher working efficiency.
In order to further improve the working efficiency, a second generation, a third generation and a fourth generation DDR SDRAM have been developed. However, according to standards set to the DRAM by the JEDEC solid state technology association, when an access operation is executed on the DRAM, it requires to consecutively receive a plurality of memory commands from a memory controller, and respectively execute corresponding memory operations according to each of the memory command in order to complete the access operation. For example, when a batch of data is to be written, the memory controller consecutively sends three memory commands corresponding to memory operations of activate row address, read column address and precharge to the DRAM, and the DRAM consecutively completes the aforementioned three memory operations. In another example, when a plurality batches of data is to be written consecutively, the memory controller is not only required to repeatedly send RD commands to the DRAM, but is also required to transmit a plurality of memory addresses to the DRAM. Therefore, if excessive data transmission (including memory commands or addresses, etc.) between the memory controller and the DRAM can be decreased, system efficiency is improved, and system power consumption is decreased.